Catering to a large undergraduate laboratory class requires the experiments to be robust, low maintenance, and easy to set up with low cost test equipment at the disposal of most university laboratories. Most introductory undergraduate semiconductor device laboratory courses utilize packaged semiconductor integrated circuit chips to illustrate the functioning and applications of fundamental semiconductor devices such as diodes and transistors. While such methods do justice to the illustration of device concepts, the packages abstract the device physics and manufacturing and promote a “black-box” mentality towards device engineering. We have proposed and implemented a novel undergraduate device laboratory experiment, where metal oxide semiconductor capacitor (MOSCAP) devices were designed and fabricated at our university cleanroom and provided to students to perform basic capacitance-voltage profile measurements. To allow over a hundred students to simultaneously perform the experiments, we fabricated miniature test jigs that served as probe stations with spring-loaded pogo pins to make electrical contact with the devices. Using a simple op-amp based circuit that is easy for second year undergraduates to analyze, students are able to successfully extract device parameters such as substrate doping density and flat-band voltage using this experiment, and visualize the different modes of operation of a MOSCAP.
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Capacitance-voltage profiling of MOS capacitors: A case study of hands-on semiconductor testing for an undergraduate laboratory
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October 2018
APPARATUS AND DEMONSTRATION NOTES|
October 01 2018
Capacitance-voltage profiling of MOS capacitors: A case study of hands-on semiconductor testing for an undergraduate laboratory
J. Joy;
J. Joy
Department of Electrical Engineering, IIT Bombay
, Mumbai, MH 400076, India
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M. P. Date;
M. P. Date
Department of Electrical Engineering, IIT Bombay
, Mumbai, MH 400076, India
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B. M. Arora;
B. M. Arora
Department of Electrical Engineering, IIT Bombay
, Mumbai, MH 400076, India
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K. L. Narasimhan;
K. L. Narasimhan
Department of Electrical Engineering, IIT Bombay
, Mumbai, MH 400076, India
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a)
Electronic mail: [email protected]
Am. J. Phys. 86, 787–796 (2018)
Article history
Received:
April 11 2018
Accepted:
August 11 2018
Citation
J. Joy, M. P. Date, B. M. Arora, K. L. Narasimhan, S. Tallur; Capacitance-voltage profiling of MOS capacitors: A case study of hands-on semiconductor testing for an undergraduate laboratory. Am. J. Phys. 1 October 2018; 86 (10): 787–796. https://doi.org/10.1119/1.5052360
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